Conductor structures can be created based on metallic nanoparticle suspensions printed on plastic or paper substrates and sintered at plastic/paper-compatible temperatures (T<200° C.). Such silver nanoinks are readily available from companies such as Cabot Inc. or Harima Inc. In addition to sintering at oven, laser [N. Bieri et al., Superlattices and Microstructures 35, 437 (2004).], UV and microwave [J. Perelaer et al., Adv. Mater. 18, 2101 (2006)] sintering is also known in prior art.
Patent Application FI 20060697, still unpublished when filing the present application, describes an improved method for sintering nanoparticle systems, electrical sintering. In that method, the nanoparticle system conductivity drastically improves under electrical treatment. In comparison with the conventional thermal sintering, the electrical sintering method is fast and reduces the thermal loading of the substrate and other surrounding structures. Electrical sintering enables direct online monitoring of the conductivity of the sintered lines and it enables patterning of the conductor structures during sintering. FI 20060697 also describes that the remaining resistance of the electrically sintered structure can be systematically controlled by the boundary conditions of the applied electric treatment (e.g. source impedance (bias resistor), dynamical source adjustment based on sintering process propagation, etc.).
S. Sivaramakrishnan, et al. suggest another method for controlled insulator-to-metal transformation in printable polymer composites with nanometal clusters in Nature Materials 6, 149 (2007). A similar method is disclosed in Patent Application Publication WO 2007/004033 A2.
US 2004/0085797 discloses a method for changing the state of nano- or microparticles by means of electric DC voltage. The voltage is applied by electrodes located on surfaces of a flexible, gel-like layer containing dispersed particles, whereby the particles orient aligned to the electric field or form clusters, the conductivity of the structure being locally increased. The method is not well suitable for producing non-volatile structures and cannot be used for forming conductor wires on surfaces.
WO 2005/104226 discloses a method for fabricating through-contacts in semiconductor chips by applying a very high (>1 kV) voltage burst through a nanoparticle-containing layer. The method cannot be used for forming conductor wires on surfaces.
US 2006/0159899 discloses a method for multi-layer printing of electronics and displays. In the method, electronic inks are deposited on a surface and the inks are cured. Deposition of a subsequent layer is carried only after a previous layer has been cured, i.e., brought into its final state. Thus, the method does not allow manufacturing of, for example, printed writable memories.